8t(9<(hisilicon,hi6220-hikeyhisilicon,hi6220 +7HiKey Development Boardpsci arm,psci-0.2=smccpus+cpu-mapcluster0core0Dcore1Dcore2Dcore3Dcluster1core0Dcore1Dcore2Dcore3D idle-statesHpscicpu-sleeparm,idle-stateUf} cluster-sleeparm,idle-stateUf} cpu@0arm,cortex-a53arm,armv8cpupsci    #27cpu@1arm,cortex-a53arm,armv8cpupsci   #27cpu@2arm,cortex-a53arm,armv8cpupsci   #27cpu@3arm,cortex-a53arm,armv8cpupsci   #27cpu@100arm,cortex-a53arm,armv8cpupsci  #27cpu@101arm,cortex-a53arm,armv8cpupsci  #27cpu@102arm,cortex-a53arm,armv8cpupsci  #27cpu@103arm,cortex-a53arm,armv8cpupsci  #27 l2-cache0cache l2-cache1cachecpu_opp_tableoperating-points-v2L opp00W e^ހl opp01W^ހl opp02W+s@^l opp03W98p^`l opp04WG^KPl interrupt-controller@f6801000 arm,gic-400@ @ ` }  timerarm,armv8-timer 0   soc simple-bus+sram@fff80000!hisilicon,hi6220-sramctrlsyscon ao_ctrl@f7800000hisilicon,hi6220-aoctrlsyscon sys_ctrl@f7030000 hisilicon,hi6220-sysctrlsyscon media_ctrl@f4410000"hisilicon,hi6220-mediactrlsysconATpm_ctrl@f7032000hisilicon,hi6220-pmctrlsyscon acpu_sctrl@f6504000#hisilicon,hi6220-acpu-sctrlsysconP@Xmedianoc_ade@f4520000sysconR@Sstub_clockhisilicon,hi6220-stub-clkmbox-tx  uart@f8015000arm,pl011arm,primecellP $$$uartclkapb_pclkuart@f7111000arm,pl011arm,primecell %uartclkapb_pclkdefault ok&)6рbluetooth ti,wl1835-st K ext_clockuart@f7112000arm,pl011arm,primecell  &uartclkapb_pclkdefaultok XLS-UART0uart@f7113000arm,pl011arm,primecell0 'uartclkapb_pclkdefaultok XLS-UART1uart@f7114000arm,pl011arm,primecell@ (uartclkapb_pclkdefault disableddma@f7370000hisilicon,k3-dma-1.07^iv  T  hi6220_dmaokOtimer@f8008000arm,sp804arm,primecelltimer1timer2apb_pclkrtc@f8003000arm,pl031arm,primecell0  % apb_pclkrtc@f8004000arm,pl031arm,primecell@ & apb_pclkpinmux@f7010000pinctrl-single|+ pPX`hpx!+08Jz~default !"#$+gpio-range boot_sel_pmx_func. emmc_pmx_funcP.  $:sd_pmx_func0.  ?sd_pmx_idle0.  Bsdio_pmx_func0.(,048<Gsdio_pmx_idle0.(,048<Jisp_pmx_func.$(,048<@DHLPTX\`hkadc_ssi_pmx_func.h!codec_clk_pmx_func.l"codec_pmx_func .ptx|fm_pmx_func .bt_pmx_func .pwm_in_pmx_func.#bl_pwm_pmx_func.$uart0_pmx_func.uart1_pmx_func .uart2_pmx_func .uart3_pmx_func .uart4_pmx_func .uart5_pmx_func.i2c0_pmx_func./i2c1_pmx_func.1i2c2_pmx_func.3spi0_pmx_func .,pinmux@f7010800pinconf-single+ default%&'()boot_sel_cfg_func.B_zp%hkadc_ssi_cfg_func.lB_zp&emmc_clk_cfg_func.B_z p;emmc_cfg_funcH.  $(B_zp<emmc_rst_cfg_func.,B_zp=sd_clk_cfg_func. B_z0p@sd_clk_cfg_idle. B_zpCsd_cfg_func(. B_z pAsd_cfg_idle(. B_zpDsdio_clk_cfg_func.4B_z pHsdio_clk_cfg_idle.4B_zpKsdio_cfg_func(.8<@DHB_zpIsdio_cfg_idle(.8<@DHB_zpLisp_cfg_func1x.(,048<@DHLPX\`dB_zpisp_cfg_idle1.48B_zpisp_cfg_func2.TB_zpcodec_clk_cfg_func.pB_zp'codec_clk_cfg_idle.pB_zpcodec_cfg_func1.tB_zpcodec_cfg_func2.x|B_zpcodec_cfg_idle2.x|B_zpfm_cfg_func .B_zpbt_cfg_func .B_zpbt_cfg_idle .B_zppwm_in_cfg_func.B_zp(bl_pwm_cfg_func.B_zp)uart0_cfg_func1.B_zpuart0_cfg_func2.B_zpuart1_cfg_func1.B_zpuart1_cfg_func2.B_zpuart2_cfg_func .B_zpuart3_cfg_func .B_zpuart4_cfg_func .B_zpuart5_cfg_func.B_zpi2c0_cfg_func.B_zp0i2c1_cfg_func.B_zp2i2c2_cfg_func.B_zp4spi0_cfg_func .B_zp-pinmux@f8001800pinconf-singlex+ default*rstout_n_cfg_func.B_zp*pmu_peri_en_cfg_func.B_zpsysclk0_en_cfg_func.B_zpjtag_tdo_cfg_func. B_z prf_reset_cfg_func.ptB_zpgpio@f8011000arm,pl061arm,primecell 4} apb_pclkOPWR_HOLDDSI_SELUSB_HUB_RESET_NUSB_SELHDMI_PDWL_REG_ONPWRON_DET5V_HUB_EN5gpio@f8012000arm,pl061arm,primecell  5} apb_pclk:SD_DETHDMI_INTPMU_IRQ_NWL_HOST_WAKENCNCNCBT_REG_ONgpio@f8013000arm,pl061arm,primecell0 6} apb_pclkBGPIO-AGPIO-BGPIO-CGPIO-DGPIO-EUSB_ID_DETUSB_VBUS_DETGPIO-Hgpio@f8014000arm,pl061arm,primecell@ 7+P} apb_pclk%GPIO3_0NCNCNCWLAN_ACTIVENCNCugpio@f7020000arm,pl061arm,primecell 8+X} apb_pclk?USER_LED1USER_LED2USER_LED3USER_LED4SD_SELNCNCBT_ACTIVEtgpio@f7021000arm,pl061arm,primecell 9+`} apb_pclk?NCNC[UART1_RxD][UART1_TxD][AUX_SSI1]NC[PCM_CLK][PCM_FS]gpio@f7022000arm,pl061arm,primecell  :+h} apb_pclk=[SPI0_DIN][SPI0_DOUT][SPI0_CS][SPI0_SCLK]NCNCNCGPIO-G.gpio@f7023000arm,pl061arm,primecell0 ;+p} apb_pclk$NCNCNCNC[PCM_DI][PCM_DO]NCNCgpio@f7024000arm,pl061arm,primecell@ < +x+} apb_pclkNC[CEC_CLK_19_2MHZ]NCgpio@f7025000arm,pl061arm,primecellP =+} apb_pclk'GPIO-JGPIO-LNCNCNCNC[ISP_CCLK0]gpio@f7026000arm,pl061arm,primecell` > ++} apb_pclk?BOOT_SEL[ISP_CCLK1]GPIO-IGPIO-KNCNC[I2C2_SDA][I2C2_SCL]gpio@f7027000arm,pl061arm,primecellp ? ++} apb_pclk"[I2C3_SDA][I2C3_SCL]NCNCNCgpio@f7028000arm,pl061arm,primecell @ +!++} apb_pclk8[BT_PCM_XFS][BT_PCM_DI][BT_PCM_DO]NCNCNCNCGPIO-Fgpio@f7029000arm,pl061arm,primecell A+0} apb_pclkh[UART0_RX][UART0_TX][BT_UART1_CTS][BT_UART1_RTS][BT_UART1_RX][BT_UART1_TX][UART0_CTS][UART0_RTS]gpio@f702a000arm,pl061arm,primecell B+8} apb_pclkZ[UART0_RxD][UART0_TxD][I2C0_SCL][I2C0_SDA][I2C1_SCL][I2C1_SDA][I2C2_SCL][I2C2_SDA]gpio@f702b000arm,pl061arm,primecell C0+J+z+~} apb_pclk NCgpio@f702c000arm,pl061arm,primecell D+} apb_pclkgpio@f702d000arm,pl061arm,primecell E+} apb_pclkgpio@f702e000arm,pl061arm,primecell F+} apb_pclkgpio@f702f000arm,pl061arm,primecell G+} apb_pclkspi@f7106000arm,pl022arm,primecell` 2 apb_pclkdefault,- .oki2c@f7100000snps,designware-i2c , ,default/0oki2c@f7101000snps,designware-i2c -,default12oki2c@f7102000snps,designware-i2c  .,default34ok+adv7533@39 adi,adv75339  5ports+port@0endpoint/6Wport@2endpoint/7Pusbphyhisilicon,hi6220-usb-phy?J8U9usb@f72c0000hisilicon,hi6220-usb,q9 vusb2-phyotgotg< Mmailbox@f7510000hisilicon,hi6220-mbox Q ^dwmmc0@f723d000hisilicon,hi6220-dw-mshc# Hciubiuresetdefault:;<=>dwmmc1@f723e000hisilicon,hi6220-dw-mshcU# I+ciubiureset defaultidle ?@A  BCD):GTaEFn ydwmmc2@f723f000hisilicon,hi6220-dw-mshc# Jciubiureset defaultidle GHI  JKLMN+wlcore@2 ti,wl1835 watchdog@f8005000arm,sp805arm,primecellP   apb_pclktsensor@0,f7030700hisilicon,tsensor  thermal_clkQi2s@f7118000hisilicon,hi6210-i2s { 8dacodeci2s-baseOOrxtxportsport@0vendpoint/Pi2s7thermal-zonescls0d Qtripstrip-point@0/;passivetrip-point@1/$;passiveRcooling-mapsmap0FR Kade@f4100000hisilicon,hi6220-adex Zade_basedST sTTT(clk_ade_coreclk_codec_jpegclk_ade_pix&TT6u**yokportendpoint/UVdsi@f4107800hisilicon,hi6220-dsixTpclkokports+port@0endpoint/VUport@1endpoint@0/W6debug@f6590000&arm,coresight-cpu-debugarm,primecellY; apb_pclkDdebug@f6592000&arm,coresight-cpu-debugarm,primecellY ; apb_pclkDdebug@f6594000&arm,coresight-cpu-debugarm,primecellY@; apb_pclkDdebug@f6596000&arm,coresight-cpu-debugarm,primecellY`; apb_pclkDdebug@f65d0000&arm,coresight-cpu-debugarm,primecell]; apb_pclkDdebug@f65d2000&arm,coresight-cpu-debugarm,primecell] ; apb_pclkDdebug@f65d4000&arm,coresight-cpu-debugarm,primecell]@; apb_pclkDdebug@f65d6000&arm,coresight-cpu-debugarm,primecell]`; apb_pclkD funnel@f6401000#arm,coresight-funnelarm,primecell@X apb_pclkports+port@0endpoint/Y[port@1endpoint/Zbetf@f6402000 arm,coresight-tmcarm,primecell@ X apb_pclkports+port@0endpoint/[Yport@1endpoint/\]replicatorarm,coresight-replicatorX apb_pclkports+port@0endpoint/]\port@1endpoint/^`port@2endpoint/_aetr@f6404000 arm,coresight-tmcarm,primecell@@X apb_pclkports+port@0endpoint/`^tpiu@f6405000!arm,coresight-tpiuarm,primecell@PX apb_pclkports+port@0endpoint/a_funnel@f6501000#arm,coresight-funnelarm,primecellPX apb_pclkports+port@0endpoint/bZport@1endpoint/ckport@2endpoint/dlport@3endpoint/emport@4endpoint/fnport@5endpoint/goport@6endpoint/hpport@7endpoint/iqport@8endpoint/jretm@f659c000"arm,coresight-etm4xarm,primecellYX apb_pclkDportendpoint/kcetm@f659d000"arm,coresight-etm4xarm,primecellYX apb_pclkDportendpoint/ldetm@f659e000"arm,coresight-etm4xarm,primecellYX apb_pclkDportendpoint/meetm@f659f000"arm,coresight-etm4xarm,primecellYX apb_pclkDportendpoint/nfetm@f65dc000"arm,coresight-etm4xarm,primecell]X apb_pclkDportendpoint/ogetm@f65dd000"arm,coresight-etm4xarm,primecell]X apb_pclkDportendpoint/phetm@f65de000"arm,coresight-etm4xarm,primecell]X apb_pclkDportendpoint/qietm@f65df000"arm,coresight-etm4xarm,primecell]X apb_pclkD portendpoint/rjaliases/soc/uart@f8015000/soc/uart@f7111000/soc/uart@f7112000/soc/uart@f7113000chosenserial3:115200n8memory@0memory` `A"reserved-memory+ramoops@21f00000ramoops!linux,cmashared-dma-poolreboot-mode-syscon@5f01000sysconsimple-mfdreboot-modesyscon-reboot-modewfUwfU wfUregulator@0regulator-fixed.SYS_5V=LK@ULK@msregulator@1regulator-fixed.VDD_3V3=2ZU2ZmsMregulator@2regulator-fixed.5V_HUB=LK@ULK@m 5s8wl1835-pwrseqmmc-pwrseq-simple 5 ext_clock  Nleds gpio-ledsuser_led4 Xuser_led4 Rt heartbeatuser_led3 Xuser_led3 Rtmmc0user_led2 Xuser_led2 Rtmmc1user_led1 Xuser_led1 Rtcpu0wlan_active_led Xwifi_active Ruphy0txoffbt_active_led Xbt_active Rthci0rxoffpmic@f8000000hisilicon,hi655x-pmic}  regulatorsLDO2 .LDO2_2V8=&%U0xLDO7 .LDO7_SDIO=w@U2ZxELDO10 .LDO10_2V85=w@U-hFLDO13 .LDO13_1V8=jU0xLDO14 .LDO14_2V8=&%U0xLDO15 .LDO15_1V8=jU0mxLDO17 .LDO17_2V5=&%U0xLDO19 .LDO19_3V0=w@U-h>LDO21 .LDO21_1V8=-PUxLDO22 .LDO22_1V2= UOmxfirmwareopteelinaro,optee-tz=smcsound_cardaudio-graph-card4v compatibleinterrupt-parent#address-cells#size-cellsmodelmethodcpuentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usphandlewakeup-latency-usdevice_typeregenable-methodnext-level-cacheclocksoperating-points-v2cpu-idle-states#cooling-cellsdynamic-power-coefficientopp-sharedopp-hzopp-microvoltclock-latency-ns#interrupt-cellsinterrupt-controllerinterruptsranges#clock-cells#reset-cellshisilicon,hi6220-clk-srammbox-namesmboxesclock-namespinctrl-namespinctrl-0statusassigned-clocksassigned-clock-ratesenable-gpioslabel#dma-cellsdma-channelsdma-requestsdma-no-ccidma-type#pinctrl-cells#gpio-range-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,gpio-range#pinctrl-single,gpio-range-cellspinctrl-single,pinspinctrl-single,bias-pulldownpinctrl-single,bias-pulluppinctrl-single,drive-strengthgpio-controller#gpio-cellsgpio-line-namesgpio-rangesbus-idenable-dmanum-cscs-gpiosi2c-sda-hold-time-nspd-gpiosadi,dsi-lanes#sound-dai-cellsremote-endpoint#phy-cellsphy-supplyhisilicon,peripheral-sysconphysphy-namesdr_modeg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-size#mbox-cellsresetsreset-namescap-mmc-highspeednon-removablebus-widthvmmc-supplypinctrl-1card-detect-delaycap-sd-highspeedsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50vqmmc-supplydisable-wpcd-gpioscap-power-off-cardmmc-pwrseq#thermal-sensor-cellsdmasdma-nameshisilicon,sysctrl-syscondai-formatpolling-delaypolling-delay-passivesustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicereg-nameshisilicon,noc-syscondma-coherentslave-modeserial0serial1serial2serial3stdout-pathrecord-sizeconsole-sizeftrace-sizereusablelinux,cma-defaultoffsetmode-normalmode-bootloadermode-recoveryregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onvin-supplygpioreset-gpiospost-power-on-delay-mspower-off-delay-uslinux,default-triggerpanic-indicatordefault-statepmic-gpiosregulator-enable-ramp-delaydais